Design Issues

In the code generation phase, various issues can arises:

1. Input to the code generator
2. Target program
3. Memory management
4. Instruction selection
5. Register allocation
6. Evaluation order

1. Input to the code generator

• The input to the code generator contains the intermediate representation of the source program and the information of the symbol table. The source program is produced by the front end.
• Intermediate representation has the several choices:
    a) Postfix notation
    b) Syntax tree
    c) Three address code
• We assume front end produces low-level intermediate representation i.e. values of names in it can directly manipulated by the machine instructions.
• The code generation phase needs complete error-free intermediate code as an input requires.

2. Target program:

The target program is the output of the code generator. The output can be:

a) Assembly language: It allows subprogram to be separately compiled.

b) Relocatable machine language: It makes the process of code generation easier.

c) Absolute machine language: It can be placed in a fixed location in memory and can be executed immediately.

3. Memory management

• During code generation process the symbol table entries have to be mapped to actual p addresses and levels have to be mapped to instruction address.
• Mapping name in the source program to address of data is co-operating done by the front end and code generator.
• Local variables are stack allocation in the activation record while global variables are in static area.

4. Instruction selection:

• Nature of instruction set of the target machine should be complete and uniform.
• When you consider the efficiency of target machine then the instruction speed and machine idioms are important factors.
• The quality of the generated code can be determined by its speed and size.

Example:

The Three address code is:

1. a:= b + c  
2. d:= a + e  

Inefficient assembly code is:

1. MOV b, R0              R0→b                              
2. ADD c, R0   R0      c + R0  
3. MOV R0, a               a   →   R0  
4. MOV a, R0      R0→  a  
5. ADD e, R0               R0  →       e + R0  
6. MOV R0, d               d    →  R0  

5. Register allocation

Register can be accessed faster than memory. The instructions involving operands in register are shorter and faster than those involving in memory operand.

The following sub problems arise when we use registers:

Register allocation: In register allocation, we select the set of variables that will reside in register.

Register assignment: In Register assignment, we pick the register that contains variable.

Certain machine requires even-odd pairs of registers for some operands and result.

For example:

Consider the following division instruction of the form:

1. D x, y  

Where,

x is the dividend even register in even/odd register pair

y is the divisor

Even register is used to hold the reminder.

Old register is used to hold the quotient.

6. Evaluation order

The efficiency of the target code can be affected by the order in which the computations are performed. Some computation orders need fewer registers to hold results of intermediate than others.