🎓 Computer Science & Engineering Portal

Master Engineering Disciplines with Structured Notes

Comprehensive academic lecture notes, exam-oriented unit summaries, laboratory manuals, and previous year question papers designed strictly for university students.

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University Syllabi

AKTU & AICTE aligned semester credit guidelines.

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Exam Question Papers

Previous 5 years solved university semester papers.

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Lab Manuals & Viva

Practical codes with outputs and interview questions.

Core Subjects & Units Hub

Click on any specific unit to immediately view its lecture notes below

🎨 Computer Graphics (CG)

Scan Conversion, Bresenham Line & Circle, 2D/3D Transformations, Viewing & Clipping.

Unit 1: Raster Scan, DDA & Bresenham →
Unit 2: 2D & 3D Transformations →
Unit 3: Sutherland-Hodgman & Clipping →
Unit 4: Hidden Surface Elimination →

🧠 Machine Learning (ML / MLT)

Supervised/Unsupervised Learning, Regression, Decision Trees, SVM, Neural Nets & Clustering.

Unit 1: Linear & Logistic Regression →
Unit 2: Decision Trees & Support Vector (SVM) →
Unit 3: K-Means & Dimensionality Reduction →
Unit 4: Neural Networks & Gradient Descent →

🤖 Artificial Intelligence (AI)

Search Algorithms, First Order Logic, Probabilistic Reasoning, Expert Systems & Robotics.

Unit 1: Propositional Logic & Connectives →
Unit 2: Probabilistic Reasoning & Uncertainty →
Unit 3: State Space Search & Heuristics →
Unit 4: First Order Predicate Logic (FOL) →

🗄️ Database Management (DBMS)

ER-Modeling, Relational Algebra, SQL Queries, Normalization (1NF-BCNF) and ACID Transactions.

Unit 1: ER Model, Entities & Attributes →
Unit 2: Functional Dependencies & 1NF to BCNF →
Unit 3: ACID Properties & Concurrency Control →
Unit 4: Relational Algebra & Complex SQL Joins →

🌲 Data Structures & Algorithms

Arrays, Linked Lists, Stacks, Queues, Binary Trees, Graphs, Sorting & Asymptotic Analysis.

Unit 1: Arrays, Matrices & Recursion →
Unit 2: Stacks, Queues & Infix-to-Postfix →
Unit 3: Binary Trees, BST & AVL Rotations →
Unit 4: Graphs (BFS, DFS, Dijkstra, MST) →

⚡ Operating Systems

Process Scheduling, Deadlocks, Synchronization, Virtual Memory, Paging and Disk Management.

Unit 1: Process States, PCB & Multi-Threading →
Unit 2: CPU Scheduling (FCFS, SJF, RR) →
Unit 3: Deadlocks, Semaphores & Banker's Algo →
Unit 4: Virtual Memory, Paging & Disk Scheduling →

🌐 Computer Networks

OSI & TCP/IP Models, Error Detection, IPv4 Subnetting, Routing Protocols and TCP Handshake.

Unit 1: OSI vs TCP/IP Protocol Architectures →
Unit 2: Data Link Layer, Framing & Sliding Window →
Unit 3: IPv4 Addressing, Subnetting & Routing →
Unit 4: Transport Layer (TCP 3-Way Handshake) →

⚙️ Design of Algorithms (DAA)

Asymptotic Notations, Divide & Conquer, Dynamic Programming, Greedy Approach & Backtracking.

Unit 1: Time Complexity, Master's Theorem →
Unit 2: 0/1 Knapsack & Dynamic Programming →
Unit 3: Greedy Methods & Graph Algorithms →
Viewing All Lectures

Low Level Design

Low  Level  Design: 

  • Low Level Design in short LLD is like detailing HLD means it refers to component-level design process. 
  • A detailed description of each and every module means it includes actual logic for every system component and it goes deep into each module's specification. It is also known as micro level/detailed design. 
  • It is created by designers and developers. It converts the High Level Solution into Detailed solution. It is created as a second means after High Level Design.
  • Low-level design (LLD) is a component-level design process that follows a step-by-step refinement process.
  •  This process can be used for designing data structures, required software architecture, source code and ultimately, performance algorithms. 
  • The LLD phase is the stage where the actual software components are designed.

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