1. Which of the following is true about Computer Architecture?
A. It acts as the interface between hardware and software.
B. Computer Architecture tells us how exactly all the units in the system are arranged and interconnected.
C. Computer Architecture is concerned with the structure and behaviour of a computer system as seen by the user.
D. It involves Physical Components
Ans : A
Explanation: It acts as the interface between hardware and software is true statement and all other statement are related to Computer Organization.
2. Which of the following is true about Computer Organization?
A. It deals with high-level design issues.
B. It involves Logic (Instruction sets, Addressing modes, Data types, Cache optimization).
C. Computer Organization tells us how exactly all the units in the system are arranged and interconnected.
D. None of the Above
Ans : C
Explanation: Computer Organization tells us how exactly all the units in the system are arranged and interconnected is true about Computer Organization and all other statement are related to Computer Architecture.
3. Which format is used to store data?
A. BCH
B. BCD
C. Binary
D. Decimal
Ans : B
Explanation: BCD format is used to store data.
4. The program written and before being compiled or assembled is called ____________.
A. Start Program
B. Intermediate program
C. Source Program
D. Natural Program
Ans : C
Explanation: The program written and before being compiled or assembled is called Source Program.
5. The ________ is the computational center of the CPU.
A. Registers
B. ALU
C. Flip-Flop
D. Multiplexer
Ans : B
Explanation: The ALU is the computational center of the CPU.
6. The input devices use _______ to store the data received
A. Primary Memory
B. Secondary Memory
C. Buffer
D. External Memory
Ans : C
Explanation: The input devices use buffers to store the data received and when the buffer has some data it sends it to the processor.
7. The I/O devices are connected to the CPU via __________.
A. SDRAM’s
B. Control circuits
C. Signals
D. BUS
Ans : D
Explanation: The I/O devices are connected to the CPU via BUS.
8. An optimizing Compiler does _________
A. Better compilation of the given piece of code
B. Takes advantage of the type of processor and reduces its process time
C. Does better memory management
D. All of the above
Ans : B
Explanation: An optimizing compiler is a compiler designed for the specific purpose of increasing the operation speed of the processor by reducing the time taken to compile the program instructions.
9. Which bus is used to connect the monitor to the CPU?
A. Single Bus
B. SCSI Bus
C. Multiple Bus
D. Rambus
Ans : B
Explanation: SCSI BUS is usually used to connect video devices to the processor.
10. Which of the following is used to choose between incrementing the PC or performing ALU operations?
A. Conditional Units
B. Multiplexer
C. Control Codes
D. Memory bus
Ans : B
Explanation: The multiplexer circuit is used to choose between the two as it can give different results based on the input.
11. RTN stands for ___________
a) Register Transfer Notation
b) Register Transmission Notation
c) Regular Transmission Notation
d) Regular Transfer Notation
Answer: a
Explanation: This is the way of writing the assembly language code with the help of register notations.
12. The instruction, Add Loc,R1 in RTN is _______
a) AddSetCC Loc+R1
b) R1=Loc+R1
c) Not possible to write in RTN
d) R1<-[Loc]+[R1]
Answer: d
Explanation: None.
13. Can you perform an addition on three operands simultaneously in ALN using Add instruction?
a) Yes
b) Not possible using Add, we’ve to use AddSetCC
c) Not permitted
d) None of the mentioned
Answer: c
Explanation: You cannot perform an addition on three operands simultaneously because the third operand is where the result is stored.
14. The instruction, Add R1,R2,R3 in RTN is _______
a) R3=R1+R2+R3
b) R3<-[R1]+[R2]+[R3]
c) R3=[R1]+[R2]
d) R3<-[R1]+[R2]
Answer: d
Explanation: In RTN the first operand is the destination and the second operand is the source.
15. In a system, which has 32 registers the register id is __________ long.
a) 16 bit
b) 8 bits
c) 5 bits
d) 6 bits
Answer: c
Explanation: The ID is the name tag given to each of the registers and used to identify them.
16. The two phases of executing an instruction are __________
a) Instruction decoding and storage
b) Instruction fetch and instruction execution
c) Instruction execution and storage
d) Instruction fetch and Instruction processing
Answer: b
Explanation: First, the instructions are fetched and decoded and then they’re executed and stored.
17. The Instruction fetch phase ends with _________
a) Placing the data from the address in MAR into MDR
b) Placing the address of the data into MAR
c) Completing the execution of the data and placing its storage address into MAR
d) Decoding the data in MDR and placing it in IR
Answer: d
Explanation: The fetch ends with the instruction getting decoded and being placed in the IR and the PC getting incremented.
18. While using the iterative construct (Branching) in execution _____________ instruction is used to check the condition.
a) TestAndSet
b) Branch
c) TestCondn
d) None of the mentioned
Answer: b
Explanation: Branch instruction is used to check the test condition and to perform the memory jump with the help of offset.
19. When using Branching, the usual sequencing of the PC is altered. A new instruction is loaded which is called as ______
a) Branch target
b) Loop target
c) Forward target
d) Jump instruction
Answer: a
Explanation: None.
20. The condition flag Z is set to 1 to indicate _______
a) The operation has resulted in an error
b) The operation requires an interrupt call
c) The result is zero
d) There is no empty register available
Answer: c
Explanation: This condition flag is used to check if the arithmetic operation yields a zero output.
21. ____________ is the raw material used as input and __________ is the processed data obtained as output of data processing.
a) Data, Instructions
b) Instructions, Program
c) Data, Program
d) Program, Code
Answer: a
Explanation: Data can be assumed as a raw material which, in turns after processing gives the desired output in the form of instructions. Further, a set of ordered and meaningful instructions is known as a program.
22. Which of the following is not a characteristic of a computer?
a) Diligence
b) I.Q.
c) Accuracy
d) Versatility
Answer: b
Explanation: The Computer system has no I.Q. of its own. It does only what it is programmed to do. It cannot take decisions of its own.
A computer is diligent because it can work continuously for hours without getting any errors or without getting grumbled.
The accuracy of a computer is consistently high and its level of accuracy depends on its design. A computer can perform any task if, it can be broken down into a series of logical steps. Therefore, a computer is versatile.
23. Fill in the blank in the diagram.
a) Input Unit
b) Memory Unit
c) Control Unit
d) I/O Unit
Answer: c
Explanation: The control unit manages and coordinates the operations of a computer system. The ALU is responsible for performing all the arithmetic and bitwise operations . Therefore, both these units combine to form the brain of the computer ,which is the central processing unit.
24. The part of a processor which contains hardware necessary to perform all the operations required by a computer:
a) Data path
b) Controller
c) Registers
d) Cache
Answer: a
Explanation: A processor is a part of the computer which does all the data manipulation and decision making. A processor comprises of:
A data path which contains the hardware necessary to perform all the operations. A controller tells the data path what needs to be done.
The registers act as intermediate storage for the data.
25. What does MAR stand for?
a) Main Address Register
b) Memory Access Register
c) Main Accessible Register
d) Memory Address Register
Answer: d
Explanation: MAR is a type of register which is responsible for the fetch operation. MAR is connected to the address bus and it specifies the address for the read and write operations.
26. If the control signals are generated by combinational logic, then they are generated by a type of _______________ controlled unit.
a) Micro programmed
b) Software
c) Logic
d) Hardwired
Answer: d
Explanation: The main task of a control unit is to generate control signals. There are two main types of control units:
A hardwired control unit generates control signals by using combinational logic circuits and the Micro programmed control unit generates control signals by using some softwares.
27. Which is the simplest method of implementing hardwired control unit?
a) State Table Method
b) Delay Element Method
c) Sequence Counter Method
d) Using Circuits
Answer: a
Explanation: There are 3 ways of implementing hardwired control unit:
A state table is the simplest method in which a number of circuits are designed based on the cells in the table.
A delay element method consists of a flowchart drawn for the circuit. A D-flip flop is used as a delay element.
A sequence counter method used k-modulo counter as a replacement for k delay elements.
28. A set of microinstructions for a single machine instruction is called ___________
a) Program
b) Command
c) Micro program
d) Micro command
Answer: c
Explanation: For every micro-operation, a set of microinstructions are written which indicate the control signals to be activated. A set of microinstructions is a micro program. The address of the next microinstruction is given by a Micro-program counter.
29. Micro-program consists of a set of microinstructions which are strings of 0s and 1s.
a) True
b) False
Answer: a
Explanation: The computer understands only binary language. So, the micro-program should have instructions which are in the form of 0s and 1s. Each output line of the micro-program corresponds to one control signal.
30. A decoder is required in case of a ______________
a) Vertical Microinstruction
b) Horizontal Microinstruction
c) Multilevel Microinstruction
d) All types of microinstructions
Answer: a
Explanation: There are two types of microinstructions: Horizontal and Vertical.
In a horizontal microinstruction, each bit represents a signal to be activated whereas, in case of vertical microinstruction bits are decoded and, the decoder then produces signals.
31. ________ are the different type/s of generating control signals.
a) Micro-programmed
b) Hardwired
c) Micro-instruction
d) Both Micro-programmed and Hardwired
Answer: d
Explanation: The above is used to generate control signals in different types of system architectures.
32. The type of control signal is generated based on ________
a) contents of the step counter
b) Contents of IR
c) Contents of condition flags
d) All of the mentioned
Answer: d
Explanation: Based on the information above the type of control signal is decided.
33. What does the hardwired control generator consist of?
a) Decoder/encoder
b) Condition codes
c) Control step counter
d) All of the mentioned
Answer: d
Explanation: The CU uses the above blocks and IR to produce the necessary signal.
34. What does the end instruction do?
a) It ends the generation of a signal
b) It ends the complete generation process
c) It starts a new instruction fetch cycle and resets the counter
d) It is used to shift the control to the processor
Answer: c
Explanation: It is basically used to start the generation of a new signal.
35. The Zin signal to the processor is generated using, Zin = T1+T6 ADD + T4.BR…
a) True
b) False
Answer: a
Explanation: The signal is generated using the logic of the formula above.
36. What does the RUN signal do?
a) It causes the termination of a signal
b) It causes a particular signal to perform its operation
c) It causes a particular signal to end
d) It increments the step counter by one
Answer: d
Explanation: The RUN signal increments the step counter by one for each clock cycle.
37. The name hardwired came because the sequence of operations carried out is determined by the wiring.
a) True
b) False
Answer: a
Explanation: In other words hardwired is another name for Hardware Control signal generator.
38. The benefit of using this approach is ________
a) It is cost effective
b) It is highly efficient
c) It is very reliable
d) It increases the speed of operation
Answer: d
Explanation: None.
39. The disadvantage/s of the hardwired approach is ________
a) It is less flexible
b) It cannot be used for complex instructions
c) It is costly
d) less flexible & cannot be used for complex instructions
Answer: d
Explanation: The more complex the instruction set less applicable to a hardwired approach.
40. The End signal is generated using, End = T7.ADD + T5.BR + (T5.N+ T4.-N).BRN…
a) True
b) False
Answer: a
Explanation: None.
41. ______ have been developed specifically for pipelined systems.
a) Utility software
b) Speed up utilities
c) Optimizing compilers
d) None of the mentioned
Answer: c
Explanation: The compilers which are designed to remove redundant parts of the code are called as optimizing compilers.
42. The pipelining process is also called as ______
a) Superscalar operation
b) Assembly line operation
c) Von Neumann cycle
d) None of the mentioned
Answer: b
Explanation: It is called so because it performs its operation at the assembly level.
43. The fetch and execution cycles are interleaved with the help of ________
a) Modification in processor architecture
b) Clock
c) Special unit
d) Control unit
Answer: b
Explanation: The time cycle of the clock is adjusted to perform the interleaving.
44. Each stage in pipelining should be completed within ___________ cycle.
a) 1
b) 2
c) 3
d) 4
Answer: a
Explanation: The stages in the pipelining should get completed within one cycle to increase the speed of performance.
45. In pipelining the task which requires the least time is performed first.
a) True
b) False
Answer: b
Explanation: This is done to avoid starvation of the longer task.
46. If a unit completes its task before the allotted time period, then _______
a) It’ll perform some other task in the remaining time
b) Its time gets reallocated to a different task
c) It’ll remain idle for the remaining time
d) None of the mentioned
Answer: c
Explanation: None.
47. To increase the speed of memory access in pipelining, we make use of _______
a) Special memory locations
b) Special purpose registers
c) Cache
d) Buffers
Answer: c
Explanation: By using the cache we can reduce the speed of memory access by a factor of 10.
48. The periods of time when the unit is idle is called as _____
a) Stalls
b) Bubbles
c) Hazards
d) Both Stalls and Bubbles
Answer: d
Explanation: The stalls are a type of hazards that affect a pipelined system.
49. The contention for the usage of a hardware device is called ______
a) Structural hazard
b) Stalk
c) Deadlock
d) None of the mentioned
Answer: a
Explanation: None.
50. The situation wherein the data of operands are not available is called ______
a) Data hazard
b) Stock
c) Deadlock
d) Structural hazard
Answer: a
Explanation: Data hazards are generally caused when the data is not ready on the destination side.
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